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Design of a 300-watt isolated power supply with minimized circuit input-to-output parasitic capacitance

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Conference
  • Session
  • Thursday, 10 April 2014
  • 00:00
  • Duration: 28 mins
  • Publication date: 10 Apr 2014
  • Location: IETTV_Room, IETTV_Venue, Manchester, United Kingdom
  • Part of event 7th International Conference on Power, Electronics, Machines & Drives (PEMD 2014)

About the session

This presentation describes the design of a 300-watt isolated power supply for a MOS gate driver circuit in medium- and high-voltage applications. The key feature of the developed power supply is having a very low circuit input-to-output parasitic capacitance, thus maximizing its noise immunity. This makes it suitable for modular stacking applications. The converter is a voltage-controlled current source, utilizing a transformer that has an extremely low inter-winding parasitic capacitance. Experiments show that an overall circuit input-to-output parasitic capacitance of 10 pF can be achieved. Design analysis and experimental results are provided to prove the feasibility of the converter.


Channels

Power

Power

Sectors

Sectors

Speakers

  • BP

    Ben Papé

    Technical Unversity of Denmark, Department of Electrical Engineering, PhD student

  • LK

    Lingjiang Kong

    Technical Unversity of Denmark, Department of Electrical Engineering, PhD student

  • JY

    Jin Yang

    Technical Unversity of Denmark, Department of Electrical Engineering, PhD student

  • JY

    Jin Yang

    Technical Unversity of Denmark, Department of Electrical Engineering, PhD student

  • JY

    Jin Yang

    Technical Unversity of Denmark, Department of Electrical Engineering, PhD student

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