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Calibre Innovations to Reduce Your Signoff Cycle Time (Calibre: Calibre nmDRC Auto-waivers, Calibre Xact)

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Conference
  • Session
  • Tuesday, 22 June 2010
  • 00:00
  • Duration: 30 mins
  • Publication date: 22 Jun 2010
  • Location: IETTV_Room, IETTV_Venue, Grove, Oxfordshire, United Kingdom
  • Part of event EDA Tech Forum

About the session

The challenges of manufacturing at sizes below 45nm are driving much more complex design rule checks and model-based design-for-manufacturing (DFM) analysis before signoff. Other competitive demands, such as achieving signoff on IP from many suppliers, more stringent Design for Reliability (DFR) checks, and tighter error tolerances on extraction and simulation, are all adding to the difficulty and time required to complete signoff. This presentation introduces a range of innovations that simplify and accelerate the signoff process, including: equation-based DRC to speed DFM and other complex design rules; Programmable Electrical Rule Checking (ERC) to improve reliability; auto-waivers to eliminate DRC violations that have already been waived by the foundry; and high-performance 3D extraction with full-chip capacity and field solver accuracy.

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  • BB

    Barry Byford

    Mentor Graphics, IC Physical Verification Solutions, Applications Engineer

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