System-on-a-chip may be yesterday's news, but that should not be confused with thinking that all of the problems are solved. The truth is that, as that as Moore's Law continues its inexorable advance, it uncovers more issues, and the ones already uncovered continue to grow at an alarming pace. Today, faced with about 100 million transistors of ASIC capacity on a chip, the scope of the design challenge has grown to include business, architecture, hardware/software, verification, commissioning, reuse and quality. Are we coping with this or are we going under? ITRS tells us that we will have 1 billion transistors available by 2007; what additional issues will that cause and how are we anticipating them today?