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IC Design: Rethink Everything for Recovery Readiness!

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Conference
  • Session
  • Wednesday, 03 June 2009
  • 00:3 - 00:3
  • Duration: 31 mins
  • Publication date: 19 Jun 2009
  • Location: IETTV_Room, IETTV_Venue, Munich, Germany
  • Part of event GSA and IET International Semiconductor Forum 2009

About the session

Semiconductor and systems companies have always been concerned about the cost of doing business. But in today's economy, this concern ranges from anxiety to flat-out panic. Design teams today must be able to meet two huge challenges simultaneously: getting their chips out the door on time with no sacrifice in quality of results or capabilities, and doing so while attacking the ballooning growth in total cost of design. But what possibilities exist for attaining such grand-scale efficiencies, both now and in the near future? In this presentation, the speaker presents his perspective on what’s driving the current economic and technological realities for companies doing IC design, what looming challenges are waiting just down the road and what solutions will be necessary to equip them to be recovery ready.

Channels

Electronics

Electronics

Speaker

  • AG

    Aart de Geus

    Synopsys Inc., Chairman of the Board and Chief Executive Officer

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