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DC fault parameter sensitivity analysis

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Conference
  • Session
  • Tuesday, 01 April 2014
  • 00:1 - 00:1
  • Duration: 14 mins
  • Publication date: 01 Apr 2014
  • Location: IETTV_Room, IETTV_Venue, Copenhagen, Denmark
  • Part of event DPSP 2014 - 12th IET International Conference on Developments in Power System Protection: Protecting the Green Grid

About the session

At present, high-voltage direct current (HVDC) voltage source converters (VSC) are susceptible to DC faults, leading to extreme currents. The fault current cannot be controlled by the converter switching flows in the anti-parallel diodes. Protection devices are, therefore, required to operate with sufficient speed to avoid device failure. A method is introduced to calculate the critical time for protection to operate. Using this method, it is then shown how the critical time may be extended by way of optimization of passive system components. In order to perform this optimization, a new post-fault (when the converter gating signals are inhibited) model of the modular multi-level converter (MMC) is introduced which drastically reduces simulation time, allowing high-resolution parameter sweeps to be performed. The model is validated and is shown to produce fault characteristics similar to that of a conventional switched model.

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    Frederick Page

    University of Strathclyde, Department of Electronic and Electrical Engineering, Research Assistant

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