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- Session
- 00:9 - 00:9
- Duration: 31 mins
- Publication date: 09 Apr 2014
- Location: IETTV_Room, IETTV_Venue, Manchester, United Kingdom
- Part of event 7th International Conference on Power, Electronics, Machines & Drives (PEMD 2014)
About the session
This session describes how Altera field-programmable gate arrays and system-on-chip devices can be used as a 'drive-on-chip' that is able to interface to external devices and power electronics as well as running complex control algorithms. FPGA logic can be used to parallelize calculations, resulting in fast, dependable timing for hardware interfaces. FPGA hardware can be used to accelerate calculations such as FFTs while keeping the main algorithm flow in C on soft or hard processors. There is a demonstration of the Altera Motor-Control Reference Design, a working design that can be supplied by Altera and used as the starting point for a commercial drive design or as a platform for research. A three-level inverter reference design is also available. The speaker discusses the design process, software tools and university programme through which Altera supports university learning with its devices and development boards.