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A fair signalling architecture

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Event
  • Session
  • Wednesday, 23 October 2019
  • 13:23 - 13:23
  • Duration: 20 mins
  • Publication date: 14 Nov 2019
  • Location: Frans van Hasseltzaal , TU Delft, Delft, Netherlands
  • Part of event ASPECT 2019 - Inst. of Railway Signal Engineers

About the session

For decades, electronic interlockings have been mostly based on an architecture having the interlocking logic processed by safe computers either centrally located (main signalling building) or distributed (e.g. in stations). The central or distributed choice being driven by a series of decision factors often linked to operability, availability, and maintainability. The electronic interlocking is then connected to Object Controllers (OC) strategically grouped or distributed along the railway network, "dumbly" interfacing the interlocking logic to the signalling objects. Grouping or distributing OC is again the result of decision factors similar to those mentioned for the interlocking previously; the trend is however to minimize cables by placing OC close to signalling objects for the purpose of copper volume reduction, while minimizing associated construction, installation and testing works. While this standard architecture provides flexibilities to answer most Infrastructure Manager's needs, the centralized logic increases the system reaction times, creates complexities in the central logic (e.g. logic for aspect and point proving functions, aspect graceful degradation, points normalisation,..), and has impacts on later signalling engineering activities, requiring full possession of the central interlocking's logic during upgrade, test and commissioning. For the ETCS level 2, RBCs are associated to interlockings, but RBC borders are often at locations different from the interlocking ones. It is due to the RBC/RBC borders constraints leading their implementation nearly impossible in dense area but mostly only in plain track. Moreover, to mitigate potential traffic operation disturbances from driver operational issues (wrong RBC Id) or ETCS radio failures (in operation braking), the amount of RBC/RBC borders is kept minimized. To reduce the number of RBC/RBC borders, ERTMS manufacturers are designing higher capacity RBCs, managing more trains and covering largest railway areas. In result of this, signalling engineering activities phasing and possessions are becoming more complex and difficult to handle. The ETCS architecture becomes monolithic, with less flexibility to support interlocking architectures variability. From these observations, it is necessary to rethink the interlocking architectures we know, and to look at reducing interfaces by integrating interlocking and ETCS, enhance reaction times and robustness, and cancel the constraints born with the RBC/RBC borders. This presentation will look into scalable architecture solutions, simple to deploy, with scalable resilience to failures and operational disturbances. It will be explained how a new interlocking architecture, based on a fair leadership principle, simplifies or even suppresses the central interlocking logic by reallocating it into intelligent object controllers, able to locally manage functional sets of signalling objects or specific processes (e.g. level crossings). Interlocking and RBC functions could then be integrated in clusters, easier to put in service and maintain. Combining the clusters allows then to cover a country wide domain under a single RBC entity (i.e. without RBC/RBC radio hand-over), operating 1000 trains. By increasing operational availability, operability, and maintainability, the ETCS based signalling system becomes more resilient and sustainable while avoiding the need to continuously increase safe computer performances.

Keywords:
  • Cloud
  • Cyber attack
  • Disaster recovery
  • FSE
  • Firewall
  • Hackers
  • IRSE
  • Malware
  • Networks
  • Railway
  • Ransomware
  • Signalling
  • Social Engineering
  • Software
  • Traffic control
  • Trojans
  • USB
  • WiFi

Channels

IT

IT

Transport

Transport

Speaker

  • Andre Radomiak

    Andre Radomiak

    ATLAS System Design Authority Alstom

    André is an experienced Railway Systems engineer, classified in Alstom’s organization as Senior Expert in signalling systems development and application, with over 25 years’ experience in railway systems, signalling ERTMS specifications, development and projects. André started his carrier on TFM SSI product development, he specialized his signalling knowledge in design, development and implementation of innovative signalling systems, ATP, and ATO for high capacity lines (e.g. Hong Kong East Rail lines). Prior to his current positions in Alstom Digital Mobility, he acquired experience from various positions in Project execution in signalling systems design, specification, architectures, system development technics, “design for safety”, process leadership, risk management and technical problem solving.
computer crime security of data
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