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A Methodology to Maximize Your AMS SoC Design and Verification Flow

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Conference
  • Session
  • Tuesday, 22 June 2010
  • 00:22 - 00:22
  • Duration: 24 mins
  • Publication date: 22 Jun 2010
  • Location: IETTV_Room, IETTV_Venue, Grove, Oxfordshire, United Kingdom
  • Part of event EDA Tech Forum

About the session

The design and verification of the analog and mixed-signal functionality in advanced devices is a challenging task. High levels of integration and short time-to-market windows demand a well-planned and organized methodology. This presentation explains how Mentor Graphics has developed the key technologies under its mixed-signal design and verification platform to facilitate such a methodology. The platform allows transparent and efficient combinations of analog/RF descriptions, AMS behavioral models and pure digital descriptions. System-level languages and fast-SPICE technologies are also fully embedded into the platform to complement this most flexible platform.

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  • SC

    Steve Collis

    Mentor Graphics, European Analogue Design & Verification Manager

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