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A Methodology to Maximize Your AMS SoC Design and Verification Flow

Steve Collis

Paper from EDA Tech Forum organised by Mentor Graphics, Oxfordshire, UK, 22 June 2010, Track 1: Proven Approaches to Higher Productivity in the IC Design and Verification Flow

22 June 2010  Corporate presentations

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About the presentation

The design and verification of the analog and mixed-signal functionality in advanced devices is a challenging task. High levels of integration and short time-to-market windows demand a well-planned and organized methodology. Mentor Graphics has developed the key technologies under its mixed-signal design and verification platform to facilitate such a methodology. The platform allows transparent and efficient combinations of analog/RF descriptions, AMS behavioral models and pure digital descriptions. System-level languages and fast-SPICE technologies are also fully embedded into the platform to complement this most flexible platform.

About the speaker

If you have any questions regarding this presentation please contact steve_collis@mentor.com

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